Lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a mask utilized in the photolithography process may contain a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged onto a target portion (e.g. comprising one or more dies) on a substrate (silicon wafer) that has been coated with a layer of radiation-sensitive material (resist). In general, a single wafer will contain a whole network of adjacent target portions that are successively irradiated via the projection system, one at a time. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion in one go; such an apparatus is commonly referred to as a wafer stepper. In an alternative apparatus—commonly referred to as a step-and-scan apparatus—each target portion is irradiated by progressively scanning the mask pattern under the projection beam in a given reference direction (the “scanning” direction) while synchronously scanning the substrate table parallel or anti-parallel to this direction; since, in general, the projection system will have a magnification factor M (generally <1), the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. More information with regard to lithographic devices as here described can be found, for example, in U.S. Pat. No. 6,046,792, which is incorporated herein by reference.
In a manufacturing process using a lithographic projection apparatus, the mask pattern is imaged onto a substrate that is at least partially covered by a layer of radiation-sensitive material (resist). Prior to this imaging step, the substrate may undergo various procedures, such as priming, resist coating and a soft bake. After exposure, the substrate may be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake and measurement/inspection of the imaged features. This array of procedures is used as a basis to pattern an individual layer of a device, e.g. an IC. Such a patterned layer may then undergo various processes such as etching, ion-implantation (doping), metallization, oxidation, chemo-mechanical polishing, etc., all intended to finish off an individual layer. If several layers are required, then the whole procedure, or a variant thereof, will have to be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes can be obtained, for example, from the book “Microchip Fabrication: A Practical Guide to Semiconductor Processing”, Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997, ISBN 0-07-067250-4, incorporated herein by reference.
For the sake of simplicity, the projection system may hereinafter be referred to as the “lens”; however, this term should be broadly interpreted as encompassing various types of projection system, including refractive optics, reflective optics, and catadioptric systems, for example. The radiation system may also include components operating according to any of these design types for directing, shaping or controlling the projection beam of radiation, and such components may also be referred to below, collectively or singularly, as a “lens”. Further, the lithographic apparatus may be of a type having two or more substrate tables (and/or two or more mask tables). In such “multiple stage” devices the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposures. Twin stage lithographic apparatus are described, for example, in U.S. Pat. No. 5,969,441 and WO 98/40791, incorporated herein by reference.
Of course, one of the goals in integrated circuit fabrication is to faithfully reproduce the original design on the wafer (via the mask). As the demand to image smaller and smaller features in the semiconductor manufacturing process has continued unabated, the limitations of optical lithography that were was once accepted have been exceeded repeatedly.
Several optical extension approaches have been proposed over the years, the most notable being the alternating aperture phase shift mask (alt-PSM) first published in the early 1980's. Limitations to alt-PSM practical applications, such as the ability to manufacture the reticles, phase conflicts, design restrictions, and reticle topography effects on the propagating electromagnetic field, have prevented this approach from widespread use in manufacturing. Variations of the alternating aperture phase shift reticle, including 60-120-180 degree multi-phase reticles, 90-270 phase reticles, and dual-trench processing, that to some extent correct for these types of problems, have been employed to some degree and have seen limited application in the wafer lithography process. However, in order to make the process viable for manufacturing, a two-reticle, complimentary alt-PSM has been adopted and is currently the most common method for implementing alt-PSM in actual production.
In such a complimentary alt-PSM approach, the critical gate geometries (i.e., the minimum feature size to be printed) are extracted from the design so that they can be imaged separately from the rest of the gate layer patterns. The gate patterns are imaged by using a “dark field” PSM reticle that has a window cut out on either side of each gate, with one of the windows being phase shifted by 180 degrees relative to the other, thereby giving the desired alternating aperture phase shifting across the gate geometry. A second binary reticle, which contains protection blocks in the areas where the gates are patterned, is used to expose the non-critical geometries and the field area that was not exposed during the first exposure. However, using such a two-exposure method comes at the cost of throughput, multiple reticles, first and second exposure overlay errors caused by stepper alignment and reticle placement errors, as well as imaging distortions that occur at the boundaries of the first and second exposures.
Even if such costs associated with the complimentary alt-PSM method in order to gain the resolution enhancement necessary to print sub-wavelength features are acceptable, very little benefit is achieved as far as reducing the minimum pitch that can be resolved. Specifically, it is preferable to use more coherent illumination (σ<=0.30) in order to obtain the highest resolution enhancement that results from the phase difference on either side of the gate pattern. If so, this can induce very strong proximity effects such as very severe corner rounding or fast and steep CD changes from near 1:1 pitch to isolated features. Both pose additional complications to the already difficult design challenges and further limit the practical implementation.
For other types of photomasks, excluding alt-PSM, the minimum gate pitch is limited to the wavelength (λ) of the imaging system divided by the numerical aperture (NA) of the lens or a Kpitch of approximately 0.50. One way to overcome this pitch limitation is to print every other feature in a first exposure, so as to effectively double the pitch, and then with a second exposure print the features in between the features that were exposed with the first exposure. It is also possible to decompose the desired pattern in a more complex manner which results in two or more patterns where the minimum pitch has been increased to a point where it can be resolved, and where the result of imaging the patterns, one on top of the other, is the final desired pattern. This pattern decomposition strategy can be implemented using binary reticles. However, in such a decomposition method, there is no longer any resolution enhancement that comes from phase shifting. Moreover, the decomposition method has the same disadvantages as any other multiple exposure approach including throughput, multiple reticles, exposure overlay accuracy, and boundaries between the exposures.
Thus, current optical technology techniques continue to be limited in the smallest pitch that can be printed using a particular wavelength. This pitch, which is referred to as kpitch, is defined as:kpitch=(pitch/2)*(NA/lambda),where NA is the numerical aperture of the exposure system and lambda is the exposure wavelength. Indeed, current methods of optical lithography are limited to a kpitch of approximately 0.50.
As such, there is need for a photolithography method which allows for an improvement of the pitch resolution capabilities (i.e., a reduction in kpitch) of currently available photolithography apparatus, and that overcomes the drawbacks associated with currently known techniques.